Hardware Optimization on FPGA for the Modular Multiplication in the AMNS Representation.
Asma ChaouchFangan-Yssouf DossoLaurent-Stéphane DidierNadia El MrabetBouraoui OuniBelgacem BoualleguePublished in: CRiSIS (2019)
Keyphrases
- hardware implementation
- low cost
- field programmable gate array
- real time
- optimization process
- hardware design
- software implementation
- optimization method
- hardware architecture
- parallel hardware
- floating point
- computing systems
- dedicated hardware
- programmable logic
- single chip
- hardware and software
- image representation
- optimization problems
- general purpose
- personal computer
- parallel architecture
- modular architecture
- high speed