Larry L. Kinney

Publication Activity (10 Years)

Years Active: 1968-2004
Publications (10 Years): 0

Publications

Xiaoyun Sun, Larry L. Kinney, Bapiraju Vinnakota
Combining dictionary coding and LFSR reseeding for test data compression. DAC (2004)
Xiaoyun Sun, Larry L. Kinney, Bapiraju Vinnakota
Test Vector Generation Based on Correlation Model for Ratio-Iddq. ITC (2003)
Xiaoyun Sun, Larry L. Kinney, Bapiraju Vinnakota
Development of Energy Consumption Ratio Test. VTS (2003)
Gyungho Lee, Bland Quattlebaum, Sangyeun Cho, Larry L. Kinney
Design of a bus-based shared-memory multiprocessor DICE. Microprocess. Microsystems 22 (7) (1999)
Gyungho Lee, Bland Quattlebaum, Sangyeun Cho, Larry L. Kinney
Global Bus Design of a Bus-Based COMA Multiprocessor DICE. ICCD (1996)
Sang-Hoon Song, Larry L. Kinney
Incremental test pattern generation. VTS (1993)
Aloke Guha, Larry L. Kinney
Relating the Cyclic Behavior of Linear and Intrainverted Feedback Shift Registers. IEEE Trans. Computers 41 (9) (1992)
Lawrence P. Holmquist, Larry L. Kinney
Concurrent Error Detection for Restricted Fault Sets in Sequential Circuits and Microprogrammed Control Units Using Convolutional Codes. ITC (1991)
Lawrence P. Holmquist, Larry L. Kinney
Concurrent Error Detection in Sequential Circuits Using Convolutional Codes. AAECC (1991)
George Foo, Larry L. Kinney
Integrated Pull Manufacturing: The Integration of MAP and PULL Systems. ICSI (1990)
Jianjian Song, Larry L. Kinney
Distributed Termination on a Mesh. ICPP (1) (1988)
A. Bailas, Larry L. Kinney
Evaluation of a concurrent error detection method for microprogrammed control units. MICRO (1988)
Lawrence P. Holmquist, Larry L. Kinney
Error Detection with Latency in Sequential Circuits. ITC (1988)
Hasan Elhuni, Larry L. Kinney
Techniques for Testing Hexagonally Connected Systolic Arrays. ITC (1986)
Vladimir Cherkassky, Larry L. Kinney
A Group Probing Strategy for Testing Large Number of Chips. ITC (1986)
Hasan Elhuni, Anastasios Vergis, Larry L. Kinney
C-Testability of Two-Dimensional Iterative Arrays. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 5 (4) (1986)
Vijay S. Iyengar, Larry L. Kinney
Concurrent Fault Detection in Microprogrammed Control Units. IEEE Trans. Computers 34 (9) (1985)
Tammy Chan, Devesh Bhatt, Walter L. Heimerdinger, Larry L. Kinney, Marvin Lum
A High-Performance, Multi-Link, Multi-Protocol Data Link Controller for an Experimental Distributed Computer Testbed. ICDCS (1984)
Vijay S. Iyengar, Larry L. Kinney
Concurrent Testing of Flow of Control in Simple Microprogrammed Control Units. ITC (1982)
J. W. Thomas, Richard R. Ramseyer, Larry L. Kinney
Fault Tolerant Distributed Computing with Very High Speed Integrated Circuits. RTSS (1981)
Larry L. Kinney, W. Y. Yueh, Walter L. Heimerdinger, Richard R. Ramseyer, J. W. Thomas
An Architecture for a VHSIC Computer. ISCA (1981)
Larry L. Kinney, R. G. Arnold
Analysis of a Multiprocessor System with a Shared Bus. ISCA (1978)
Larry L. Kinney
B72-11 An Introduction to Switching System Design. IEEE Trans. Computers 21 (5) (1972)
Kenneth J. Thurber, E. Douglas Jensen, Larry A. Jack, Larry L. Kinney, Peter C. Patton, Lynn C. Anderson
A systematic approach to the design of digital bussing structures. AFIPS Fall Joint Computing Conference (2) (1972)
C. C. Huang, Richard Y. Kain, Larry L. Kinney
Output Sufficient Modules for Uniform Decomposition of Synchronous Sequential Circuits SWAT (1972)
Larry L. Kinney
A Characterization of Some Asynchronous Sequential Networks and State Assignments. IEEE Trans. Computers 20 (4) (1971)
Robert Orval Berg, Larry L. Kinney
Serial Adders with Overflow Correction. IEEE Trans. Computers 20 (6) (1971)
Larry L. Kinney
Decomposition of Asynchronous Sequential Switching Circuits. IEEE Trans. Computers 19 (6) (1970)
Larry L. Kinney
A Characterization of Some Asynchronous State Assignments SWAT (1968)