Kohji Takano

Publication Activity (10 Years)

Years Active: 2000-2015
Publications (10 Years): 1

Top Topics

Wavelet Decomposition

Signal Recovery

Multimedia Content

Top Venues

Publications

Yasuteru Kohda, Kohji Takano, Daiju Nakano, Nobuyuki Ohba, Toshiyuki Yamane, Yasunao Katayama
Single-channel full-duplex mmWave link using phased-array for Ethernet. CCNC (2015)
Daiju Nakano, Yasuteru Kohda, Kohji Takano, Nobuyuki Ohba, Toshiyuki Yamane, Yasunao Katayama
60-GHz single-carrier coherent detection system with robust 16-QAM signal recovery. WCNC (2014)
Nobuyuki Ohba, Kohji Takano, Yasuteru Kohda, Daiju Nakano, Toshiyuki Yamane, Yasunao Katayama
Multimedia content-downloading system using millimeter-wave attached memory. CCNC (2012)
Yasunao Katayama, Toshiyuki Yamane, Yasuteru Kohda, Kohji Takano, Daiju Nakano, Nobuyuki Ohba
MIMO link design strategy for wireless data center applications. WCNC (2012)
Daiju Nakano, Yasuteru Kohda, Kohji Takano, Toshiyuki Yamane, Nobuyuki Ohba, Yasunao Katayama
Multi-Gbps 60-GHz single-carrier system using a low-power coherent detection technique. COOL Chips (2011)
Yasuteru Kohda, Nobuyuki Ohba, Kohji Takano, Daiju Nakano, Toshiyuki Yamane, Yasunao Katayama
Instant multimedia contents downloading system using a 60-GHZ-2.4-GHZ hybrid wireless link. ICME (2011)
Yasunao Katayama, Kohji Takano, Yasuteru Kohda, Nobuyuki Ohba, Daiju Nakano
Wireless data center networking with steered-beam mmWave links. WCNC (2011)
Nobuyuki Ohba, Kohji Takano
Hardware debugging method based on signal transitions and transactions. ASP-DAC (2006)
Nobuyuki Ohba, Kohji Takano
Hardware Design Verification Using Signal Transitions and Transactions. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (4) (2006)
Nobuyuki Ohba, Kohji Takano
An SoC design methodology using FPGAs and embedded microprocessors. DAC (2004)
Akashi Satoh, Kohji Takano
A Scalable Dual-Field Elliptic Curve Cryptographic Processor. IEEE Trans. Computers 52 (4) (2003)
Akashi Satoh, Sumio Morioka, Kohji Takano, Seiji Munetoh
A Compact Rijndael Hardware Architecture with S-Box Optimization. ASIACRYPT (2001)
Akashi Satoh, Nobuyuki Ooba, Kohji Takano, Edward D'Avignon
High-Speed MARS Hardware. AES Candidate Conference (2000)