Klaus Feske

Publication Activity (10 Years)

Years Active: 1996-2002
Publications (10 Years): 0

Publications

Maik Boden, Jörg Schneider, Klaus Feske, Steffen Rülke
Enhanced Reusability for SoC-Based HW/SW Co-Design. DSD (2002)
Mirko Benz, Uwe Hatnik, Klaus Feske, Jürgen Haufe
Entwurfsunterstützung zur hardwarebasierten TCP/IP-Beschleunigung (Design Support for Hardware Based TCP/IP Accelerator). Informationstechnik Tech. Inform. 44 (3) (2002)
Klaus Feske, Georg Heinrich, Berndt Fritzsche, Mark Langer
SoC Based Low Cost Design of Digital Audio Broadcasting Transport Network Applications. FPL (2002)
Mirko Benz, Klaus Feske, Uwe Hatnik, Peter Schwarz
TCP/IP Protocol Engine System Simulation. PROMS (2001)
Klaus Feske, Michael Scholz, Günther Döring, Denis Nareike
Rapid FPGA Prototyping of a DAB Test Data Generator Using Protocol Compiler. FPL (1999)
Manfred Koegst, Günter Franke, Steffen Rülke, Klaus Feske
Multi-Criterial State Assignment for Low Power FSM Design. EUROMICRO (1998)
Manfred Koegst, Günter Franke, Klaus Feske, Steffen Rülke
Verringerung der Leistungsaufnahme in sequentiellen Schaltungen durch Vorlogik und zweistufige Zustandskodierung. MBMV (1998)
Klaus Feske, Steffen Rülke, Manfred Koegst
FPGA based prototyping using a target driven FSM partitioning strategy. ICECS (1998)
Manfred Koegst, Günter Franke, Steffen Rülke, Klaus Feske
Low Power Design of FSMs by State Assignment and Disabling Self-Loops. EUROMICRO (1997)
Klaus Feske, Sven Mulka, Manfred Koegst, Günter Elst
Technology-driven FSM partitioning for synthesis of large sequential circuits targeting lookup-table based FPGAs. FPL (1997)
Manfred Koegst, Klaus Feske, Günter Franke
State assignment for FSM low power design. EURO-DAC (1996)