Keng-Jan Hsiao

Publication Activity (10 Years)

Years Active: 2006-2016
Publications (10 Years): 2

Top Topics

Digital Entertainment

Real Time Tracking

Adaptive Algorithms

Top Venues

IEEE J. Solid State Circuits

Publications

Shon-Hang Wen, Chien-Ming Chen, Cheng-Chung Yang, Chieh-Hung Chen, Jia-Feng Jiang, Keng-Jan Hsiao, Cheng-Yu Chien
A Load-Adaptive Class-G Headphone Amplifier With Supply-Rejection Bandwidth Enhancement Technique. IEEE J. Solid State Circuits 51 (10) (2016)
Shon-Hang Wen, Chien-Ming Chen, Cheng-Chung Yang, Chieh-Hung Chen, Jia-Feng Jiang, Keng-Jan Hsiao, Cheng-Yu Chien
A 130dB PSRR, 108dB DR and 95dB SNDR, ground-referenced audio decoder with PSRR-enhanced load-adaptive Class-G 16Ohm headphone amplifiers. A-SSCC (2015)
Keng-Jan Hsiao
17.7 A 1.89nW/0.15V self-charged XO for real-time clock generation. ISSCC (2014)
Keng-Jan Hsiao
A 32.4 ppm/°C 3.2-1.6V self-chopped relaxation oscillator with adaptive supply generation. VLSIC (2012)
Che-Fu Liang, Keng-Jan Hsiao
An injection-locked ring PLL with self-aligned injection window. ISSCC (2011)
Keng-Jan Hsiao, Tai-Cheng Lee
An 8-GHz to 10-GHz Distributed DLL for Multiphase Clock Generation. IEEE J. Solid State Circuits 44 (9) (2009)
Keng-Jan Hsiao, Tai-Cheng Lee
A Low-Jitter 8-to-10GHz Distributed DLL for Multiple-Phase Clock Generation. ISSCC (2008)
Keng-Jan Hsiao, Tai-Cheng Lee
The Design and Analysis of a Fully Integrated Multiplying DLL With Adaptive Current Tuning. IEEE J. Solid State Circuits 43 (6) (2008)
Tai-Cheng Lee, Keng-Jan Hsiao
The design and analysis of a DLL-based frequency synthesizer for UWB application. IEEE J. Solid State Circuits 41 (6) (2006)