Kazunori Miyoshi

Publication Activity (10 Years)

Years Active: 2001-2016
Publications (10 Years): 5

Top Topics

Top Venues

Publications

Prakash Chaki, Takafumi Kanazawa, Kazunori Miyoshi
Strategic Mobility and Cooperative Caching in DTN: A Social Dilemma Perspective. VTC Fall (2016)
Mitomo Isomura, Kazunori Miyoshi, Tutomu Murase, Masato Oguchi, Akash Baid, Shweta Sagari, Ivan Seskar, Dipankar Raychaudhuri
Measurment and analysis on QoS of wireless LAN densely deployed with transmission rate control. WCNC (2015)
Kazunori Miyoshi, Masahiro Jibiki, Tutomu Murase
Self-Organization of Shortest Spanning Tree and Optimal Sink Node Position for Various Shapes of Large-Scale Wireless Sensor Networks. COMPSAC (2015)
Xiang Li, Yuki Narita, Yuta Gotoh, Shigeo Shioda, Nobuyoshi Komuro, Hiroo Sekiya, Shiro Sakata, Kazunori Miyoshi, Tutomu Murase
Light-weight performance analysis of Wi-Fi offload using mean-field approximation. APCC (2015)
Minh Huy Bui, Kosuke Sanada, Nobuyoshi Komuro, Shigeo Shioda, Shiro Sakata, Kazunori Miyoshi, Tutomu Murase, Hiroo Sekiya
Throughput analysis of wireless networks with tethering function. WCNC Workshops (2015)
Kazunori Miyoshi
Equivalent Circuit Model of High Speed VCSEL Implemented in Circuit Simulators. IEICE Trans. Electron. (9) (2014)
Hiroki Hagiwara, Yoshinori Takahashi, Kazunori Miyoshi
Reflected wave reproduction using the Co-Variance Method. GCCE (2014)
Kazunori Miyoshi, Masahiro Jibiki, Tutomu Murase
Fully Distributed Self-Organization of Shortest Spanning Tree and Optimal Sink Node Position for Large-Scale Wireless Sensor Network. IEICE Trans. Commun. (2) (2012)
Takashi Yoshikawa, Ichiro Hatakeyama, Kazunori Miyoshi, Kazuhiko Kurata, Juni-Ichi Sasaki, Nobuharu Kami, Takara Sugimoto, Muneo Fukaishi, Kazuyuki Nakamura, Kei Tanaka, Hiroaki Nishi, Tomohiro Kudoh
Optical interconnection as an IP macro of a CMOS library. Hot Interconnects (2001)
Takeshi Nagahori, Kazunori Miyoshi, Yukio Aizawa, Yuki Kusachi, Yasuaki Nukada, Nobuharu Kami, Naofumi Suzuki
An analog front-end chip set employing an electro-optical mixed design on SPICE for 5-Gb/s/ch parallel optical interconnection. IEEE J. Solid State Circuits 36 (12) (2001)