Kari Hepola

Publication Activity (10 Years)

Years Active: 2020-2024
Publications (10 Years): 6

Top Topics

Level Parallelism

Instruction Set

General Purpose

Energy Efficiency

Top Venues

IEEE Trans. Computers

Publications

Kari Hepola, Joonas Multanen, Pekka Jääskeläinen
Energy-Efficient Exposed Datapath Architecture With a RISC-V Instruction Set Mode. IEEE Trans. Computers 73 (2) (2024)
Alex Hirvonen, Topi Leppänen, Kari Hepola, Joonas Multanen, Joost Hoozemans, Pekka Jääskeläinen
AEx: Automated High-Level Synthesis of Compiler Programmable Co-Processors. J. Signal Process. Syst. 95 (9) (2023)
Kari Hepola, Joonas Multanen, Pekka Jääskeläinen
Dual-IS: Instruction Set Modality for Efficient Instruction Level Parallelism. ARCS (2022)
Kari Hepola, Joonas Multanen, Pekka Jääskeläinen
OpenASIP 2.0: Co-Design Toolset for RISC-V Application-Specific Instruction-Set Processors. ASAP (2022)
Joonas Multanen, Kari Hepola, Asif Ali Khan, Jerónimo Castrillón, Pekka Jääskeläinen
Energy-Efficient Instruction Delivery in Embedded Systems With Domain Wall Memory. IEEE Trans. Computers 71 (9) (2022)
Joonas Multanen, Kari Hepola, Pekka Jääskeläinen
Programmable Dictionary Code Compression for Instruction Stream Energy Efficiency. ICCD (2020)