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Dual-IS: Instruction Set Modality for Efficient Instruction Level Parallelism.
Kari Hepola
Joonas Multanen
Pekka Jääskeläinen
Published in:
ARCS (2022)
Keyphrases
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instruction set
level parallelism
floating point
application specific
computer architecture
parallel processing
multi core processors
embedded systems
artificial intelligence
instruction set architecture