Joost Hoozemans

ORCID

Publication Activity (10 Years)

Years Active: 2015-2024
Publications (10 Years): 18

Top Venues

J. Signal Process. Syst.

ARCS

ReConFig

SAMOS

Delft University of Technology, Netherlands (PHD)

Education History

Delft University of Technology, Netherlands

PHD

Publications

Philip Groet, Joost Hoozemans, Andreas Grapentin, Felix Eberhardt, Zaid Al-Ars, H. Peter Hofstee
Leveraging Apache Arrow for Zero-copy, Zero-serialization Cluster Shared Memory. CoRR (2024)
Zaid Al-Ars, Jakoba Petri-Koenig, Joost Hoozemans, Luc Dierick, H. Peter Hofstee
OctoRay: Framework for Scalable FPGA Cluster Acceleration of Python Big Data Applications. SC Workshops (2023)
Alex Hirvonen, Topi Leppänen, Kari Hepola, Joonas Multanen, Joost Hoozemans, Pekka Jääskeläinen
AEx: Automated High-Level Synthesis of Compiler Programmable Co-Processors. J. Signal Process. Syst. 95 (9) (2023)
Joost Hoozemans, Kati Tervo, Pekka Jääskeläinen, Zaid Al-Ars
Energy Efficient Multistandard Decompressor ASIP. ICCDE (2021)
Nils Voss, Peter Ziegenhein, Lukas Vermond, Joost Hoozemans, Oskar Mencer, Uwe Oelfke, Wayne Luk, Georgi Gaydadjiev
Towards Real Time Radiotherapy Simulation. J. Signal Process. Syst. 92 (9) (2020)
Johan Peltenburg, Lars T. J. van Leeuwen, Joost Hoozemans, Jian Fang, Zaid Al-Ars, H. Peter Hofstee
Battling the CPU Bottleneck in Apache Parquet to Arrow Conversion Using FPGA. FPT (2020)
Nils Voss, Peter Ziegenhein, Lukas Vermond, Joost Hoozemans, Oskar Mencer, Uwe Oelfke, Wayne Luk, Georgi Gaydadjiev
Towards Real Time Radiotherapy Simulation. ASAP (2019)
Joost Hoozemans, Jeroen van Straten, Timo Viitanen, Aleksi Tervo, Jiri Kadlec, Zaid Al-Ars
ALMARVI Execution Platform: Heterogeneous Video Processing SoC Platform on FPGA. J. Signal Process. Syst. 91 (1) (2019)
Joost Hoozemans, Rob de Jong, Steven van der Vlugt, Jeroen van Straten, Uttam Kumar Elango, Zaid Al-Ars
Frame-based Programming, Stream-Based Processing for Medical Image Processing Applications. J. Signal Process. Syst. 91 (1) (2019)
Joost Hoozemans, Jeroen van Straten, Zaid Al-Ars, Stephan Wong
Evaluating Auto-adaptation Methods for Fine-Grained Adaptable Processors. ARCS (2018)
Anderson Luiz Sartor, Pedro Henrique Exenberger Becker, Joost Hoozemans, Stephan Wong, Antonio C. S. Beck
Dynamic Trade-off among Fault Tolerance, Energy Consumption, and Performance on a Multiple-Issue VLIW Processor. IEEE Trans. Multi Scale Comput. Syst. 4 (3) (2018)
Joost Hoozemans, Jeroen van Straten, Stephan Wong
Increasing resource utilization in mixed-criticality systems using a polymorphic VLIW processor. J. Syst. Archit. 84 (2018)
Joost Hoozemans, Jeroen van Straten, Stephan Wong
Using a polymorphic VLIW processor to improve schedulability and performance for mixed-criticality systems. RTCSA (2017)
Joost Hoozemans, Rolf Heij, Jeroen van Straten, Zaid Al-Ars
VLIW-Based FPGA Computation Fabric with Streaming Memory Hierarchy for Medical Imaging Applications. ARC (2017)
Anthony Brandon, Joost Hoozemans, Jeroen van Straten, Stephan Wong
Exploring ILP and TLP on a Polymorphic VLIW Processor. ARCS (2017)
Anthony Brandon, Joost Hoozemans, Jeroen van Straten, Arthur Francisco Lorenzon, Anderson Luiz Sartor, Antonio Carlos Schneider Beck, Stephan Wong
A sparse VLIW instruction encoding scheme compatible with generic binaries. ReConFig (2015)
Joost Hoozemans, Stephan Wong, Zaid Al-Ars
Using VLIW softcore processors for image processing applications. SAMOS (2015)
Joost Hoozemans, Jens Johansen, Jeroen van Straten, Anthony Brandon, Stephan Wong
Multiple contexts in a multi-ported VLIW register file implementation. ReConFig (2015)

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Publication Activity (10 Years)

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Joost Hoozemans