Josep Maria Insenser

Publication Activity (10 Years)

Years Active: 1997-2001
Publications (10 Years): 0

Publications

E. Cantó, Juan Manuel Moreno, Joan Cabestany, Ignacio Lacadena, Josep Maria Insenser
A temporal bipartitioning algorithm for dynamically reconfigurable FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 9 (1) (2001)
E. Cantó, Juan Manuel Moreno, Joan Cabestany, Ignacio Lacadena, Josep Maria Insenser
Implementation of Virtual Circuits by Means of the FIPSOC Devices. FPL (2000)
Juan Manuel Moreno, Jordi Madrenas, Joan Cabestany, E. Cantó, Rafal Kielbik, Julio Faura, Josep Maria Insenser
Realization of Self-Repairing and Evolvable Hardware Structures by Means of Implicit Self-Configuration. Evolvable Hardware (1999)
E. Cantó, Juan Manuel Moreno, Joan Cabestany, Julio Faura, Josep Maria Insenser
A Bipartitioning Algorithm for Dynamic Reconfigurable Programmable Logic. FPL (1999)
Juan Manuel Moreno, Joan Cabestany, E. Cantó, Julio Faura, Josep Maria Insenser
The Role of Dynamic Reconfiguration for Implementing Artificial Neural Networks Models in Programmable Hardware. IWANN (2) (1999)
Juan Manuel Moreno, Jordi Madrenas, Julio Faura, E. Cantó, Joan Cabestany, Josep Maria Insenser
Feasible Evolutionary and Self-Repairing Hardware by Means of the Dynamic Reconfiguration Capabilities of the FIPSOC Devices. ICES (1998)
Julio Faura, Ignacio Lacadena, Antonio Torralba, Josep Maria Insenser
Programmable analog hardware: a case study. ICECS (1998)
Julio Faura, C. Horton, B. Krah, Joan Cabestany, M. A. Aguirre, Josep Maria Insenser
A new field programmable system-on-a-chip for mixed signal integration. ED&TC (1997)
Julio Faura, Juan Manuel Moreno, Miguel Angel Aguirre Echánove, Phuoc van Duong, Josep Maria Insenser
Multicontext dynamic reconfiguration and real time probing on a novel mixed signal programmable device with on-chip microprocessor. FPL (1997)