John Lee

Publication Activity (10 Years)

Years Active: 2008-2012
Publications (10 Years): 0

Top Topics

Hierarchically Organized

Continuous Optimization

Physical Design

Top Venues

ACM Trans. Design Autom. Electr. Syst.

Found. Trends Electron. Des. Autom.

Publications

John Lee, Puneet Gupta
Discrete Circuit Optimization: Library Based Gate Sizing and Threshold Voltage Assignment. Found. Trends Electron. Des. Autom. 6 (1) (2012)
John Lee, Puneet Gupta, Fedor Pikus
Parametric Hierarchy Recovery in Layout Extracted Netlists. ISVLSI (2012)
John Lee, Puneet Gupta
Impact of range and precision in technology on cell-based design. ICCAD (2012)
John Lee, Puneet Gupta
ECO cost measurement and incremental gate sizing for late process changes. ACM Trans. Design Autom. Electr. Syst. 18 (1) (2012)
Santiago Mok, John Lee, Puneet Gupta
Discrete sizing for leakage power optimization in physical design: A comparative study. ACM Trans. Design Autom. Electr. Syst. 18 (1) (2012)
Jason Cong, John Lee, Guojie Luo
A unified optimization framework for simultaneous gate sizing and placement under density constraints. ISCAS (2011)
John Lee, Puneet Gupta
Incremental gate sizing for late process changes. ICCD (2010)
Jason Cong, Puneet Gupta, John Lee
Evaluating Statistical Power Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (11) (2010)
Jason Cong, Puneet Gupta, John Lee
On the futility of statistical power optimization. ASP-DAC (2009)
Jason Cong, John Lee, Lieven Vandenberghe
Robust gate sizing via mean excess delay minimization. ISPD (2008)