Jitendra Dasani

Publication Activity (10 Years)

Years Active: 2017-2018
Publications (10 Years): 5

Top Topics

Cmos Technology

Write Operations

Design Considerations

Top Venues

VLSI-SoC (Selected Papers)

Publications

Vivek Nautiyal, Gaurav Singla, Sagar Dwivedi, Satinderjit Singh, Ingming Chang, Jitendra Dasani, Fakhruddin Ali Bohra
Self-Timed Shaper Circuit for Wide Memories in Advanced CMOS Technologies. ISCAS (2018)
Vivek Nautiyal, Nishant Nukala, Fakhruddin Ali Bohra, Sagar Dwivedi, Jitendra Dasani, Satinderjit Singh, Gaurav Singla, Martin Kinkade
Logic-based row redundancy technique designed in 7nm FinFET technology for embedded SRAMs. ISQED (2018)
Vivek Nautiyal, Lalit Gupta, Gaurav Singla, Jitendra Dasani, Sagar Dwivedi, Martin Kinkade
Self-timed Power-on Reset Circuit for Pseudo Dual/Two Port SRAM Used in Low-Voltage IoT Applications. VLSI-SoC (Selected Papers) (2017)
Vivek Nautiyal, Gaurav Singla, Lalit Gupta, Jitendra Dasani, Sagar Dwivedi, Martin Kinkade
Robust, self-timed power-on reset circuit for low-voltage applications. VLSI-SoC (2017)
Vivek Nautiyal, Gaurav Singla, Satinderjit Singh, Fakhruddin Ali Bohra, Jitendra Dasani, Lalit Gupta, Sagar Dwivedi
Charge recycled low power SRAM with integrated write and read assist, for wearable electronics, designed in 7nm FinFET. ISLPED (2017)