Itsujiro Arita

Publication Activity (10 Years)

Years Active: 1980-2008
Publications (10 Years): 0

Publications

Toshihiro Uchibayashi, Bernady O. Apduhan, Itsujiro Arita
Navilite: a Lightweight Indoor Location-Aware Mobile Navigation Service for the Handicapped and the Elderly. J. Mobile Multimedia 4 (2) (2008)
Toshihiro Uchibayashi, Bernady O. Apduhan, Itsujiro Arita
An Indoor Location-Aware Mobile Navigation Service for the Handicapped and the Elderly. MoMM (2007)
Takenori Koushiro, Toshinori Sato, Itsujiro Arita
A trace-level value predictor for Contrail processors. SIGARCH Comput. Archit. News 31 (3) (2003)
Toshinori Sato, Itsujiro Arita
Combining variable latency pipeline with instruction reuse for execution latency reduction. Systems and Computers in Japan 34 (12) (2003)
Toshinori Sato, Itsujiro Arita
Low-Cost Value Predictors Using Frequent Value Locality. ISHPC (2002)
Toshinori Sato, Itsujiro Arita
Reducing Energy Consumption via Low-Cost Value Prediction. PATMOS (2002)
Koichiro Tanaka, Itsujiro Arita
The development and evaluation of SHOKE2000: The PCI-based FPGA card. Systems and Computers in Japan 33 (9) (2002)
Toshinori Sato, Itsujiro Arita
Simplifying Instruction Issue Logic in Superscalar Processors. DSD (2002)
Toshiyuki Yamamoto, Kou Morita, Toshinori Sato, Itsujiro Arita
The KIT COSMOS Processor: An Application of Multi-Threading for Dynamic Optimization. PDPTA (2002)
Toshinori Sato, Itsujiro Arita
In Search of Efficient Reliable Processor Design. ICPP (2001)
Toshinori Sato, Akihiko Hamano, Kiichi Sugitani, Itsujiro Arita
Influence of Compiler Optimizations on Value Prediction. HPCN Europe (2001)
Toshinori Sato, Itsujiro Arita
Evaluating Low-Cost Fault-Tolerance Mechanism for Microprocessors on Multimedia Applications. PRDC (2001)
Toshinori Sato, Itsujiro Arita
Tolerating Transient Faults through an Instruction Reissue Mechanism. PDCS (2001)
Toshinori Sato, Itsujiro Arita
Execution Latency Reduction via Variable Latency Pipeline and Instruction Reuse. Euro-Par (2001)
Yasushi Shimono, Bernady O. Apduhan, Itsujiro Arita, Yoshimasa Ohnishi
Evaluating the Performance of a DSM Cluster with Improved Communication Subsystem. ICOIN (2001)
Takayuki Hirahara, Takashi Yamanoue, Hiroyuki Anzai, Itsujiro Arita
Sending an Image to a Large Number of Nodes in Short Time using TCP. IEEE International Conference on Multimedia and Expo (II) (2000)
Toshinori Sato, Itsujiro Arita
Partial Resolution in Data Value Predictors. ICPP (2000)
Toshinori Sato, Itsujiro Arita
Comprehensive Evaluation of an Instruction Reissue Mechanism. ISPAN (2000)
Toshinori Sato, Itsujiro Arita
The KIT COSMOS Processor: Introducing CONDOR. PDPTA (2000)
Toshinori Sato, Itsujiro Arita
Table size reduction for data value predictors by exploiting narrow width values. ICS (2000)
Tatsuya Asazu, Bernady O. Apduhan, Itsujiro Arita
Towards a Portable Cluster Computing Environment Supporting Single System Image. ICPP Workshops (1999)
Toshinori Sueyoshi, Keizo Saisho, Itsujiro Arita
Performance evaluation of the binary tree access mechanism in mimd type parallel computers. Systems and Computers in Japan 17 (9) (1986)
Itsujiro Arita
Intelligent console - A universal user interface of a computer system. Operating Systems Engineering (1980)