Igor Lemberski

Publication Activity (10 Years)

Years Active: 1998-2021
Publications (10 Years): 6

Top Topics

Delay Insensitive

Asynchronous Circuits

Top Venues

Int. J. Circuit Theory Appl.

J. Circuits Syst. Comput.

Microelectron. J.

Publications

Igor Lemberski, Artjoms Suponenkovs
Resubstitution method for big size Boolean logic design targeting look-up-table implementation. Int. J. Circuit Theory Appl. 49 (8) (2021)
Igor Lemberski, Artjoms Suponenkovs, Marina Uhanova
LUT-Oriented Asynchronous Logic Design Based on Resubstitution. DTIS (2019)
Igor Lemberski, Artjoms Suponenkovs
Asynchronous logic design targeting LUTs. MECO (2018)
Igor Lemberski, Artjoms Suponenkovs
Asynchronous logiс one-level LUT design based on partial acknowledgement. Microelectron. J. 80 (2018)
Igor Lemberski
Asynchronous Logic Implementation Based on Factorized DIMS. J. Circuits Syst. Comput. 26 (5) (2017)
Igor Lemberski
Literal Decomposition for LUT-Oriented Asynchronous Dual-Rail Logic Synthesis. J. Circuits Syst. Comput. 24 (7) (2015)
Igor Lemberski, Petr Fiser, Ruslan Suleimanov
Asynchronous sum-of-products logic minimization and orthogonalization. Int. J. Circuit Theory Appl. 42 (6) (2014)
Igor Lemberski, Petr Fiser
Dual-rail asynchronous logic multi-level implementation. Integr. 47 (1) (2014)
Igor Lemberski, Petr Fiser
Area and Speed Oriented Implementations of Asynchronous Logic Operating under Strong Constraints. DSD (2010)
Igor Lemberski, Petr Fiser
Asynchronous two-level logic of reduced cost. DDECS (2009)
Igor Lemberski
Avoiding Hazards for Speed-Independent Logic Design. World Congress on Engineering (2007)
Igor Lemberski
Cost Effective Implementation of Asynchronous Two-Level Logic. World Congress on Engineering (2007)
Igor Lemberski, Mark B. Josephs
Optimal Two-Level Delay - Insensitive Implementation of Logic Functions. PATMOS (2002)
Igor Lemberski
Methodology of Logic Synthesis for Implementation Using Heterogeneous LUT FPGAs. Great Lakes Symposium on VLSI (1999)
Igor Lemberski, M. Ratniece
XILINX4000 Architecture-Driven Synthesis for Speed. FPL (1998)
Igor Lemberski
Modified Approach to Automata State Encoding for LUT FPGA Implementation. EUROMICRO (1998)