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Hyuk Sun
ORCID
Publication Activity (10 Years)
Years Active: 2014-2020
Publications (10 Years): 7
Top Topics
Data Hiding
Image Watermarking
Monte Carlo
Bandpass
Top Venues
CICC
MWSCAS
IEEE J. Solid State Circuits
ICECS
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Publications
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Hyuk Sun
,
Kazuki Sobue
,
Koichi Hamashita
,
Tejasvi Anand
,
Un-Ku Moon
Period Jitter 3.2% Modulation Range in-Band Modulation Spread-Spectrum Clock Generator.
IEEE J. Solid State Circuits
55 (2) (2020)
Hyuk Sun
,
Kazuki Sobue
,
Koichi Hamashita
,
Un-Ku Moon
An Oversampling Stochastic ADC Using VCO-Based Quantizers.
IEEE Trans. Circuits Syst. I Regul. Pap.
(12) (2018)
Hyuk Sun
,
Kazuki Sobue
,
Koichi Hamashita
,
Tejasvi Anand
,
Un-Ku Moon
A 0.951 psrms period jitter, 3.2% modulation range, DSM-free, spread-spectrum PLL.
CICC
(2017)
Jason Muhlestein
,
Spencer Leuenberger
,
Hyuk Sun
,
Yang Xu
,
Un-Ku Moon
A 73dB SNDR 20MS/s 1.28mW SAR-TDC using hybrid two-step quantization.
CICC
(2017)
Spencer Leuenberger
,
Jason Muhlestein
,
Hyuk Sun
,
Praveen Kumar Venkatachala
,
Un-Ku Moon
A 74.33 dB SNDR 20 MSPS 2.74 mW pipelined ADC using a dynamic deadzone ring amplifier.
CICC
(2017)
Hyuk Sun
,
Jason Muhlestein
,
Spencer Leuenberger
,
Kazuki Sobue
,
Koichi Hamashita
,
Un-Ku Moon
A 50 MHz bandwidth 54.2 dB SNDR reference-free stochastic ADC using VCO-based quantizers.
A-SSCC
(2016)
Hyuk Sun
,
Kazuki Sobue
,
Koichi Hamashita
,
Un-Ku Moon
A power efficient PLL with in-loop-bandwidth spread-spectrum modulation scheme using a charge-based discrete-time loop filter.
ISCAS
(2016)
Hyuk Sun
,
Jason Muhlestein
,
Un-Ku Moon
A VCO-based spatial averaging stochastic ADC.
ICECS
(2015)
Hyuk Sun
,
Un-Ku Moon
MDLL/PLL dual-path clock generator.
MWSCAS
(2015)
Yang Xu
,
Hyuk Sun
,
Un-Ku Moon
Analysis of discrete-time charge-domain complex bandpass filter with accurately tunable center frequency.
MWSCAS
(2015)
Shiuh-Hua Wood Chiang
,
Hyuk Sun
,
Behzad Razavi
A 10-Bit 800-MHz 19-mW CMOS ADC.
IEEE J. Solid State Circuits
49 (4) (2014)