Hwei-Yu Lee

Publication Activity (10 Years)

Years Active: 2007-2011
Publications (10 Years): 0

Publications

Hwei-Yu Lee
Zero-crossing-based 8-bit 100 MS/s pipelined analogue-to-digital converter with offset compensation. IET Circuits Devices Syst. 5 (5) (2011)
Hwei-Yu Lee, Shen-Iuan Liu
A 140MS/s 10-bit Pipelined ADC with a Folded S/H Stage. ISCAS (2009)
I-Hsin Wang, Hwei-Yu Lee, Shen-Iuan Liu
An 8-bit 20-MS/s ZCBC Time-Domain Analog-to-Digital Data Converter. IEEE Trans. Circuits Syst. II Express Briefs (7) (2009)
Hwei-Yu Lee, I-Hsin Wang, Shen-Iuan Liu
A 7-BIT 400MS/s sub-ranging flash ADC in 0.18um CMOS. SoCC (2007)
Hwei-Yu Lee, Shen-Iuan Liu
A 10-BIT 100MS/s pipelined ADC IN 0.18μm CMOS technology. SoCC (2007)