Hisakazu Edamatsu

Publication Activity (10 Years)

Years Active: 1987-1998
Publications (10 Years): 0

Publications

Hisakazu Edamatsu, Katsumi Homma, Masaru Kakimoto, Yutaka Koike, Kinya Tabuchi
Pre-layout Delay Calculation Specification for CMOS ASIC Libraries. ASP-DAC (1998)
Hisakazu Edamatsu, Satoshi Ikawa, Katsuya Hasegawa
Design Methodologies for consumer-use video signal processing LSIs. DAC (1996)
Hideyuki Kabuo, Takashi Taniguchi, Akira Miyoshi, Hitoshi Yamashita, Miki Urano, Hisakazu Edamatsu, Shigeo Kuninobu
Accurate Ronding Scheme for the Newton-Raphson Method Using Redundant Binary Representation. IEEE Trans. Computers 43 (1) (1994)
Shigeo Kuninobu, Tamotsu Nishiyama, Hisakazu Edamatsu, Takashi Taniguchi, Naofumi Takagi
Design of high speed MOS multiplier and divider using redundant binary representation. IEEE Symposium on Computer Arithmetic (1987)