Héctor Posadas

Publication Activity (10 Years)

Years Active: 2012-2023
Publications (10 Years): 7

Top Topics

Error Correction

Spectral Domain

Top Venues

IEEE Embed. Syst. Lett.

Multim. Tools Appl.

J. Syst. Archit.

Publications

Daniel Suárez, Víctor Fernández, Héctor Posadas, Pablo Sánchez
Accelerating the Verification of Forward Error Correction Decoders by PCIe FPGA Cards. IEEE Embed. Syst. Lett. 15 (3) (2023)
Héctor Posadas, José Luis Vázquez, Eugenio Villar
Automatic code generation from UML for data memory optimization in microcontrollers. DCIS (2023)
Daniel Suárez, Héctor Posadas, Víctor Fernández
UML-Based Design Flow for Systems with Neural Networks. DCIS (2023)
Héctor Posadas, Javier Merino, Eugenio Villar
Data flow analysis from UML/MARTE models based on binary traces. DCIS (2020)
Héctor Posadas, Eugenio Villar, Manuel Sanchez-Renedo
Accelerating Host-Compiled Simulation by Modifying IR Code: Industrial application in the spatial domain. DCIS (2019)
David de la Fuente, Jesús Barba, Juan Carlos López, Pablo Peñil, Héctor Posadas, Pablo Sánchez Espeso
Synthesis of simulation and implementation code for OpenMAX multimedia heterogeneous systems from UML/MARTE models. Multim. Tools Appl. 76 (6) (2017)
Héctor Posadas, Pablo Peñil, Alejandro Nicolás, Eugenio Villar
Automatic synthesis of communication and concurrency for exploring component-based system implementations considering UML channel semantics. J. Syst. Archit. 61 (8) (2015)
Alejandro Nicolás, Pablo Peñil, Héctor Posadas, Eugenio Villar
Automatic Synthesis over Multiple APIs from Uml/Marte Models for Easy Platform Mapping and Reuse. DSD (2014)
Héctor Posadas, Alejandro Nicolás, Pablo Peñil, Eugenio Villar, Florian Broekaert, Michel Bourdellès, Albert Cohen, Mihai T. Lazarescu, Luciano Lavagno, Andrei Sergeevich Terechko, Miguel Glassee, Manuel Prieto
Improving the design flow for parallel and heterogeneous architectures running real-time applications: The PHARAON FP7 project. Microprocess. Microsystems 38 (8) (2014)
Héctor Posadas, Pablo Peñil, Alejandro Nicolás, Eugenio Villar
Automatic synthesis of embedded SW for evaluating physical implementation alternatives from UML/MARTE models supporting memory space separation. Microelectron. J. 45 (10) (2014)
Pablo Peñil, Héctor Posadas, Alejandro Nicolás, Eugenio Villar
Automatic synthesis from UML/MARTE models using channel semantics. ACES-MB@MoDELS (2012)