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Guiqiang Peng
ORCID
Publication Activity (10 Years)
Years Active: 2017-2023
Publications (10 Years): 8
Top Topics
Variational Bayes
Xilinx Virtex
Mimo Systems
Vlsi Architecture
Top Venues
IEEE Trans. Signal Process.
A-SSCC
IEEE Trans. Circuits Syst. I Regul. Pap.
IEEE Trans. Wirel. Commun.
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Publications
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Longlong Chen
,
Jianfeng Zhu
,
Guiqiang Peng
,
Mingxu Liu
,
Shaojun Wei
,
Leibo Liu
GEM: Ultra-Efficient Near-Memory Reconfigurable Acceleration for Read Mapping by Dividing and Predictive Scattering.
IEEE Trans. Parallel Distributed Syst.
34 (12) (2023)
Pan Wang
,
Leibo Liu
,
Sheng Zhou
,
Guiqiang Peng
,
Shouyi Yin
,
Shaojun Wei
Near-Optimal MIMO-SCMA Uplink Detection With Low-Complexity Expectation Propagation.
IEEE Trans. Wirel. Commun.
19 (2) (2020)
Guiqiang Peng
,
Leibo Liu
,
Sheng Zhou
,
Shouyi Yin
,
Shaojun Wei
A 2.92-Gb/s/W and 0.43-Gb/s/MG Flexible and Scalable CGRA-Based Baseband Processor for Massive MIMO Detection.
IEEE J. Solid State Circuits
55 (2) (2020)
Leibo Liu
,
Guiqiang Peng
,
Pan Wang
,
Sheng Zhou
,
Qiushi Wei
,
Shouyi Yin
,
Shaojun Wei
Energy- and Area-Efficient Recursive-Conjugate-Gradient-Based MMSE Detector for Massive MIMO Systems.
IEEE Trans. Signal Process.
68 (2020)
Guiqiang Peng
,
Leibo Liu
,
Sheng Zhou
,
Shouyi Yin
,
Shaojun Wei
A 1.58 Gbps/W 0.40 Gbps/mm2 ASIC Implementation of MMSE Detection for $128\times 8~64$ -QAM Massive MIMO in 65 nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
(5) (2018)
Guiqiang Peng
,
Leibo Liu
,
Qiushi Wei
,
Yao Wang
,
Shouyi Yin
,
Shaojun Wei
A 2.69 Mbps/mW 1.09 Mbps/kGE Conjugate Gradient-based MMSE Detector for 64-QAM 128×8 Massive MIMO Systems.
A-SSCC
(2018)
Guiqiang Peng
,
Leibo Liu
,
Sheng Zhou
,
Yang Xue
,
Shouyi Yin
,
Shaojun Wei
Algorithm and Architecture of a Low-Complexity and High-Parallelism Preprocessing-Based K -Best Detector for Large-Scale MIMO Systems.
IEEE Trans. Signal Process.
66 (7) (2018)
Guiqiang Peng
,
Leibo Liu
,
Peng Zhang
,
Shouyi Yin
,
Shaojun Wei
Low-Computing-Load, High-Parallelism Detection Method Based on Chebyshev Iteration for Massive MIMO Systems With VLSI Architecture.
IEEE Trans. Signal Process.
65 (14) (2017)