Fernando Martinez-Vallina

Publication Activity (10 Years)

Years Active: 2007-2017
Publications (10 Years): 2

Top Topics

Concurrent Execution

Elementary Functions

Reconfigurable Hardware

High Level Synthesis

Top Venues

IET Comput. Digit. Tech.

Publications

Spenser Gilliland, Jafar Saniie, Fernando Martinez-Vallina
Analysis of library functions for FPGA compute accelerators. EIT (2017)
Spenser Gilliland, Jafar Saniie, Fernando Martinez-Vallina
Implementation of elementary functions for FPGA compute accelerators. EIT (2016)
Fernando Martinez-Vallina, Henry Styles
Unlocking FPGAs Using High Level Synthesis Compiler Technologies. FPGA (2015)
Jasmina Vasiljevic, Ralph Wittig, Paul Schumacher, Jeff Fifield, Fernando Martinez-Vallina, Henry Styles, Paul Chow
OpenCL library of stream memory components targeting FPGAs. FPT (2015)
Fernando Martinez-Vallina, Spenser Gilliland
Performance optimization for a SHA-1 cryptographic workload expressed in OpenCL for FPGA execution. IWOCL (2015)
Fernando Martinez-Vallina, Devadas Varma, Vinay Singh
Developing optimized libraries for scalable OpenCL acceleration on FPGAs. IWOCL (2015)
Stephen Neuendorffer, Fernando Martinez-Vallina
Building zynq® accelerators with Vivado® high level synthesis. FPGA (2013)
Christophe Desmouliers, Erdal Oruklu, Semih Aslan, Jafar Saniie, Fernando Martinez-Vallina
Image and video processing platform for field programmable gate arrays using a high-level synthesis. IET Comput. Digit. Tech. 6 (6) (2012)
Nathan Jachimiec, Fernando Martinez-Vallina, Jafar Saniie
CReconfigurable finite field instruction set architecture. FPGA (2007)