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Dihang Yang
ORCID
Publication Activity (10 Years)
Years Active: 2019-2023
Publications (10 Years): 4
Top Topics
Reconstruction Error
Quantization Noise
Wavelet Transform
Clock Frequency
Top Venues
ISSCC
IEEE J. Solid State Circuits
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Publications
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David Murphy
,
Dihang Yang
,
Hooman Darabi
,
Arya Behzad
A Calibration-Free Fractional-N Analog PLL With Negligible DSM Quantization Noise.
IEEE J. Solid State Circuits
58 (9) (2023)
Dihang Yang
,
David Murphy
,
Hooman Darabi
,
Arya Behzad
,
Asad A. Abidi
,
Stephen Au
,
Sraavan R. Mundlapudi
,
Kejian Shi
,
Weiyu Leng
A Harmonic-Mixing PLL Architecture for Millimeter-Wave Application.
IEEE J. Solid State Circuits
57 (12) (2022)
Dihang Yang
,
David Murphy
,
Hooman Darabi
,
Arya Behzad
,
Asad A. Abidi
,
Stephen Au
,
Sraavan R. Mundlapudi
,
Kejian Shi
,
Weiyu Leng
A Sub-100MHz Reference-Driven 25-to-28GHz Fractional-N PLL with -250dB FoM.
ISSCC
(2022)
Dihang Yang
,
Asad A. Abidi
,
Hooman Darabi
,
Hao Xu
,
David Murphy
,
Hao Wu
,
Zhaowen Wang
A Calibration-Free Triple-Loop Bang-Bang PLL Achieving 131fsrms Jitter and-70dBc Fractional Spurs.
ISSCC
(2019)