David T. Harper III

Publication Activity (10 Years)

Years Active: 1984-1996
Publications (10 Years): 0

Publications

Jong Won Park, David T. Harper III
An Efficient Memory System for the SIMD Construction of a Gaussian Pyramid. IEEE Trans. Parallel Distributed Syst. 7 (8) (1996)
Whoi-Yul Kim, Poras T. Balsara, David T. Harper III, Jon Wong Park
Hierarchy embedded differential image for progressive transmission using lossless compression. IEEE Trans. Circuits Syst. Video Technol. 5 (1) (1995)
Douglas W. Miller, David T. Harper III
Performance analysis of disk cache write policies. Microprocess. Microsystems 19 (3) (1995)
David T. Harper III
A Multiaccess Frame Buffer Architecture. IEEE Trans. Computers 43 (5) (1994)
David T. Harper III, Yashodara Costa
Analytical Estimation of Vector Access Performance in Parallel Memory Architectures. IEEE Trans. Computers 42 (5) (1993)
David T. Harper III, David Tuma
A Parallel Algorithm for Cache Miss Ratio Evaluation. MASCOTS (1993)
Jong Won Park, David T. Harper III
Memory Architecture Support for the SIMD Construction of a Gaussian Pyramid. SPDP (1992)
David T. Harper III
Increased Memory Performance During Vector Accesses Through the use of Linear Address Transformations. IEEE Trans. Computers 41 (2) (1992)
David T. Harper III, Darel A. Linebarger
Conflict-Free Vector Access Using a Dynamic Storage Scheme. IEEE Trans. Computers 40 (3) (1991)
David T. Harper III
Reducing Memory Contention in Shared Memory Multiprocessors. ISCA (1991)
David T. Harper III
Block, Multistride Vector, and FFT Accesses in Parallel Memory Systems. IEEE Trans. Parallel Distributed Syst. 2 (1) (1991)
David T. Harper III, J. Robert Jump
Evaluation of Reduced Bandwidth Multistage Networks. J. Parallel Distributed Comput. 9 (3) (1990)
David T. Harper III
Address Transformations to Increase Memory Performance. ICPP (1) (1989)
David T. Harper III, Darel A. Linebarger
A Dynamic Storage Scheme for Conflict-Free Vector Access. ISCA (1989)
David T. Harper III, Darel A. Linebarger
Storage Schemes for Efficient Computation of a Radix 2 FFT in a Machine with Parallel Memories. ICPP (1) (1988)
David T. Harper III, J. Robert Jump
Performance Evaluation of Reduced Bandwidth Multistage Interconnection Networks. ISCA (1987)
David T. Harper III, J. Robert Jump
Vector Access Performance in Parallel Memories Using a Skewed Storage Scheme. IEEE Trans. Computers 36 (12) (1987)
David T. Harper III, J. Robert Jump
Performance Evaluation of Vector Accesses in Parallel Memories Using a Skewed Storage Scheme. ISCA (1986)
J. Robert Jump, J. D. Wise, David T. Harper III
An interleaved array-processing architecture. AFIPS National Computer Conference (1984)