J. Robert Jump

Publication Activity (10 Years)

Years Active: 1969-1994
Publications (10 Years): 0

Publications

Sandhya Dwarkadas, J. Robert Jump, James B. Sinclair
Execution-Driven Simulation of Multiprocessors: Address and Timing Analysis. ACM Trans. Model. Comput. Simul. 4 (4) (1994)
H. A. Rizvi, James B. Sinclair, J. Robert Jump, J. Carson
Execution-Driven Simulation of a Superscalar Processor. HICSS (1) (1994)
J. Robert Jump, Sridhar Lakshmanamurthy
NETSIM: A General-Purpose Interconnection Network Simulator. MASCOTS (1993)
Sandhya Dwarkadas, J. Robert Jump, R. Mukherjee, James B. Sinclair
Execution-Driven Simulation of Shared-Memory Multiprocessors. MASCOTS (1993)
Richard Covington, Sandhya Dwarkadas, J. Robert Jump, James B. Sinclair, Sridhar Madala
Efficient Simulation of Parallel Computer Systems. Int. J. Comput. Simul. 1 (1) (1991)
W. P. Dawkins, V. Debbad, J. Robert Jump, James B. Sinclair
Efficient Simulation of Multiprogramming. SIGMETRICS (1990)
David T. Harper III, J. Robert Jump
Evaluation of Reduced Bandwidth Multistage Networks. J. Parallel Distributed Comput. 9 (3) (1990)
Sandhya Dwarkadas, J. Robert Jump, James B. Sinclair
Efficient simulation of cache memories. WSC (1989)
Richard Covington, J. Robert Jump, James B. Sinclair
Cross-profiling as an efficient technique in simulating parallel computer systems. COMPSAC (1989)
Richard Covington, Sridhar Madala, V. Mehta, J. Robert Jump, James B. Sinclair
The Rice Parallel Processing Testbed. SIGMETRICS (1988)
David T. Harper III, J. Robert Jump
Performance Evaluation of Reduced Bandwidth Multistage Interconnection Networks. ISCA (1987)
David T. Harper III, J. Robert Jump
Vector Access Performance in Parallel Memories Using a Skewed Storage Scheme. IEEE Trans. Computers 36 (12) (1987)
Manoj Kumar, J. Robert Jump
Performance of Unbuffered Shuffle-Exchange Networks. IEEE Trans. Computers 35 (6) (1986)
David T. Harper III, J. Robert Jump
Performance Evaluation of Vector Accesses in Parallel Memories Using a Skewed Storage Scheme. ISCA (1986)
G. Wolf, J. Robert Jump
Matrix Multiplication in an Interleaved Array Processing Architecture. ISCA (1985)
Manoj Kumar, Daniel M. Dias, J. Robert Jump
Switching Strategies in Shuffle-Exchange Packet-Switched Networks. IEEE Trans. Computers 34 (2) (1985)
J. Robert Jump, J. D. Wise, David T. Harper III
An interleaved array-processing architecture. AFIPS National Computer Conference (1984)
Manoj Kumar, J. Robert Jump
Performance enhancement in buffered delta networks using crossbar switches and multiple links. J. Parallel Distributed Comput. 1 (2) (1984)
Manoj Kumar, Daniel M. Dias, J. Robert Jump
Switching Strategies in a Class of Packet Switching Networks ISCA (1983)
Manoj Kumar, J. Robert Jump
Generalized Delta Networks. ICPP (1983)
Daniel M. Dias, J. Robert Jump
Augmented and pruned n log n multistaged networks: topology and performance. ICPP (1982)
Daniel M. Dias, J. Robert Jump
Packet Switching Interconnection Networks for Modular Systems. Computer 14 (12) (1981)
Daniel M. Dias, J. Robert Jump
Analysis and Simulation of Buffered Delta Networks. IEEE Trans. Computers 30 (4) (1981)
N. D. Jotwani, J. Robert Jump
Top-Down Design in the Context of Parallel Programs Inf. Control. 40 (3) (1979)
Susan E. Conry, J. Robert Jump
On Functional Equivalences in a Model for Parallel Computation Inf. Control. 41 (3) (1979)
J. Robert Jump, Sudhir Ahuja
Effective Pipelining of Digital Systems. IEEE Trans. Computers 27 (9) (1978)
S. R. Ahuja, J. Robert Jump
A Modular Memory Scheme for Array Processing. ISCA (1977)
J. Robert Jump, P. S. Thiagarajan
On the Interconnection of Asynchronous Control Structures. J. ACM 22 (4) (1975)
J. Robert Jump, Jayang S. Kirtane
On the Interconnection Structure of Cellular Networks Inf. Control. 24 (1) (1974)
J. Robert Jump
Asynchronous Control Arrays. IEEE Trans. Computers 23 (10) (1974)
J. Robert Jump, P. S. Thiagarajan
On the Equivalence of Asynchronous Control Structures. SIAM J. Comput. 2 (2) (1973)
J. Robert Jump, P. S. Thiagarajan
On the Equivalence of Asynchronous Control Structures SWAT (1972)
J. Robert Jump, Dennis R. Fritsche
Microprogrammed Arrays. IEEE Trans. Computers 21 (9) (1972)
J. Robert Jump, Shreehari Marathe
On the Length of Feedback Shift Registers Inf. Control. 19 (4) (1971)
J. Robert Jump
R70-29 Uniform Synthesis of Sequential Circuits. IEEE Trans. Computers 19 (8) (1970)
J. Robert Jump
A Note on the Iterative Decomposition of Finite Automata Inf. Control. 15 (5) (1969)