David G. Haigh

Publication Activity (10 Years)

Years Active: 1993-2008
Publications (10 Years): 0

Publications

Yasuhiro Sugimoto, David G. Haigh
Conversion Scheme and the Realization of a 2-V/2.5-V Operational, 100-MS/s, MOS SHA. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2008)
Dafu Bai, David G. Haigh
Derivation of power amplifier predistortion circuits by frequency to signal amplitude transformation. ECCTD (2007)
David G. Haigh
Analytic approach to or transformations for FET circuit synthesis. Part I. Nullator-norator tree transformations. ISCAS (2006)
David G. Haigh, Thomas J. W. Clarke, Paul M. Radmore
A mathematical framework for active circuits based on port equivalence using limit variables. ISCAS (2006)
David G. Haigh, Paul M. Radmore
Admittance Matrix Models for the Nullor Using Limit Variables and Their Application to Circuit Design. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2006)
David G. Haigh
A Method of Transformation from Symbolic Transfer Function to Active-RC Circuit by Admittance Matrix Expansion. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2006)
David G. Haigh
Analytic approach to or transformations for FET circuit synthesis. Part II. Nullator-norator re-pairing and cloning. ISCAS (2006)
David G. Haigh, Thomas J. W. Clarke, Paul M. Radmore
Symbolic Framework for Linear Active Circuits Based on Port Equivalence Using Limit Variables. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2006)
David G. Haigh
Systematic synthesis of operational amplifier circuits by admittance matrix expansion. ECCTD (2005)
David G. Haigh
Symbolic active-RC circuit synthesis by admittance matrix expansion. ISCAS (1) (2005)
Phil Corbishley, David G. Haigh
Rules for systematic synthesis of all-transistor analogue circuits by admittance matrix expansion. ISCAS (6) (2005)
David G. Haigh, Paul M. Radmore
Symbolic passive-RC circuit synthesis by admittance matrix expansion. ISCAS (1) (2005)
David G. Haigh, Paul M. Radmore
New admittance matrix descriptions for the nullor with application to circuit design. ECCTD (2005)
David G. Haigh, Paul M. Radmore
Systematic synthesis method for analogue circuits. Part I. Notation and synthesis toolbox. ISCAS (1) (2004)
T. L. Lim, David G. Haigh, D. R. Webster
On the Design of Active GaAs Multipliers. ISCAS (1995)
D. R. Webster, David G. Haigh, Anthony E. Parker
Novel Circuit Synthesis Technique Using Short Channel GaAs Fets Giving Reduced Intermodulation Distortion. ISCAS (1995)
D. R. Webster, Anthony E. Parker, David G. Haigh, Paul M. Radmore
Device Circuit Interaction in the Common Source Amplifier. ISCAS (1994)
R. Lecouls, David G. Haigh, Paul M. Radmore, D. R. Webster
On Design of Analogue Multipliers using Gallium Arsenide MESFETs. ISCAS (1994)
Carlos A. Losada, David G. Haigh
On non-Linear Multi-FET Analysis. ISCAS (1994)
D. R. Webster, David G. Haigh, Anthony E. Parker
Distortion Compensation of Multi-Mesfet Circuits. ISCAS (1994)
Carlos A. Losada, David G. Haigh, Paul M. Radmore
A Systematic Method for Nonlinear Analysis of a Class of FET Circuits. ISCAS (1993)
Anthony E. Parker, David G. Haigh
Compensation of 2nd Harmonic Distortion in a 4-FET Linearised Transconductor Circuit. ISCAS (1993)