Damu Radhakrishnan

Publication Activity (10 Years)

Years Active: 1985-2009
Publications (10 Years): 0

Publications

Bijoy Antony Jose, Damu Radhakrishnan
Redundant binary partial product generators for compact accumulation in Booth multipliers. Microelectron. J. 40 (11) (2009)
Yu Shen Lin, Damu Radhakrishnan
Delay Efficient 32-Bit Carry-Skip Adder. VLSI Design 2008 (2008)
Bijoy Antony Jose, Damu Radhakrishnan
Delay Optimized Redundant Binary Adders. ICECS (2006)
Yu Shen Lin, Damu Radhakrishnan
Delay Efficient 32-bit Carry-Skip Adder. ICECS (2006)
S. Castillo, Naveen K. Samala, K. Manwaring, Baback A. Izadi, Damu Radhakrishnan
Experimental Analysis of Batteries Under Continuous and Intermittent Operations. ESA/VLSI (2004)
Naveen K. Samala, Damu Radhakrishnan, Baback A. Izadi
A Low Energy Deep Sub-Micron Bus Coding Technique. ESA/VLSI (2004)
Jayapreetha Natesan, Damu Radhakrishnan
Shift Invert Coding (SINV) for Low Power VLSI. DSD (2004)
Yong Liu, Edmund Ming-Kit Lai, A. Benjamin Premkumar, Damu Radhakrishnan
A Low-Power Pipelined Implementation of 2D Discrete Wavelet Transform. ESA/VLSI (2004)
Jayapreetha Natesan, Damu Radhakrishnan
A Novel Bus Encoding Technique for Low Power VLSI. ESA/VLSI (2004)
R. V. Menon, S. Chennupati, Naveen K. Samala, Damu Radhakrishnan, Baback A. Izadi
Switching Activity Minimization in Combinational Logic Design. ESA/VLSI (2004)
Saumya Uppaluri, Baback A. Izadi, Damu Radhakrishnan
Low-Power Dynamic Scheduling in Heterogeneous Systems. Embedded Systems and Applications (2003)
R. V. Menon, S. Chennupati, Naveen K. Samala, Damu Radhakrishnan, Baback A. Izadi
Power Optimized Combinational Logic Design. Embedded Systems and Applications (2003)
Adimathara P. Preethy, Damu Radhakrishnan, Amos Omondi
Fault-tolerance scheme for an RNS MAC: performance and cost analysis. ISCAS (2) (2001)
Adimathara P. Preethy, Damu Radhakrishnan, Amos Omondi
A high performance RNS multiply-accumulate unit. ACM Great Lakes Symposium on VLSI (2001)
Damu Radhakrishnan
Pass logic circuits with reduced switching activity for low power DSP processors. ICASSP (2000)
Damu Radhakrishnan, Adimathara P. Preethy
A Parallel Approach to Direct Analog-to-Residue Conversion. Inf. Process. Lett. 69 (5) (1999)
Damu Radhakrishnan, Adimathara P. Preethy
A new approach to data conversion: direct analog-to-residue converter. ICASSP (1998)
Damu Radhakrishnan, Taejin Pyon
Fault tolerance in RNS: an efficient approach. ICCD (1990)
Ali Feizi, Damu Radhakrishnan
Multiple Output Pass Networks: Design and Testing. ITC (1985)