A Novel Bus Encoding Technique for Low Power VLSI.

Jayapreetha Natesan Damu Radhakrishnan

Published in: ESA/VLSI (2004)

Keyphrases

low power
high speed
single chip
vlsi circuits
gate array
vlsi architecture
power consumption
power dissipation
low cost
digital signal processing
high power
mixed signal
logic circuits
wireless transmission
image sensor
real time
signal processing
signal processor
power reduction
general purpose