Cheng-Ying Chen

Publication Activity (10 Years)

Years Active: 2015-2018
Publications (10 Years): 7

Top Topics

Portfolio Optimization

Signal Processor

Random Access Memory

Top Venues

IEICE Trans. Fundam. Electron. Commun. Comput. Sci.

Publications

Yu-Chi Jiang, Xin Jie Cheam, Cheng-Ying Chen, Shu-Yu Kuo, Yao-Hsin Chou
A Novel Portfolio Optimization with Short Selling Using GNQTS and Trend Ratio. SMC (2018)
Feng Zhang, Dongyu Fan, Qi-Peng Lin, Qiang Huo, Yun Li, Lan Dai, Cheng-Ying Chen, Haihua Shen
The application of non-volatile look-up-table operations based on multilevel-cell of resistance switching random access memory. VLSI-DAT (2018)
Kaifeng Xia, Bin Wu, Tao Xiong, Cheng-Ying Chen
Design of a High-Throughput Sliding Block Viterbi Decoder for IEEE 802.11ac WLAN Systems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (8) (2017)
Feng Zhang, Dongyu Fan, Yuan Duan, Jin Li, Cong Fang, Yun Li, Xiaowei Han, Lan Dai, Cheng-Ying Chen, Jinshun Bi, Ming Liu, Meng-Fan Chang
A 130nm 1Mb HfOx embedded RRAM macro using self-adaptive peripheral circuit system techniques for 1.6X work temperature range. A-SSCC (2017)
Kaifeng Xia, Bin Wu, Tao Xiong, Tian-Chun Ye, Cheng-Ying Chen
A Hardware Efficient Multiple-Stream Pipeline FFT Processor for MIMO-OFDM Systems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2) (2017)
Lan Dai, Cheng-Ying Chen
W AGC for Multifrequency Signal Processing Based on Peak-Statistical Algorithm and Judgment Logic. VLSI Design 2016 (2016)
Cheng-Ying Chen, Hongbin Sun, Haihua Shen, Feng Zhang
ReRAM with Novel Double-Reference and Dynamic-Tracking scheme for write yield improvement. IEICE Electron. Express 13 (6) (2016)
Cheng-Ying Chen, Jun Fan, Xiao-Yu Hu, Yong Hei
A Low Power, High Performance Analog Front-End Circuit for 1 V Digital Hearing Aid SoC. Circuits Syst. Signal Process. 34 (5) (2015)