Chandra Babu Dara

Publication Activity (10 Years)

Years Active: 2011-2017
Publications (10 Years): 1

Top Topics

Digital Signal Processing

Quantitative Analysis

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Chandra Babu Dara, Themistoklis Haniotakis, Spyros Tragoudas
Delay Analysis for Current Mode Threshold Logic Gate Designs. IEEE Trans. Very Large Scale Integr. Syst. 25 (3) (2017)
Chandra Babu Dara, Themistoklis Haniotakis, Spyros Tragoudas
Low power and high speed current-mode memristor-based TLGs. DFTS (2013)
Chandra Babu Dara, Themistoklis Haniotakis, Spyros Tragoudas
Delay Analysis for an N-Input Current Mode Threshold Logic Gate. ISVLSI (2012)
Chandra Babu Dara, Spyros Tragoudas, Themistoklis Haniotakis
A Metric for Weight Assignment to Optimize the Performance of MOBILE Threshold Logic Gate. DFT (2011)