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Berthold Seger
Publication Activity (10 Years)
Years Active: 1996-2012
Publications (10 Years): 0
Top Venues
ESSCIRC
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Publications
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Daniel Gruber
,
Martin Clara
,
Berthold Seger
A high-input-swing common-mode-robust programmable gain amplifier in 65nm CMOS.
ESSCIRC
(2012)
Martin Clara
,
Wolfgang Klatzer
,
Daniel Gruber
,
Arnold Marak
,
Berthold Seger
,
Wolfgang Pribyl
A 1.5V 13bit 130-300MS/s self-calibrated DAC with active output stage and 50MHz signal bandwidth in 0.13μm CMOS.
ESSCIRC
(2008)
Martin Clara
,
Wolfgang Klatzer
,
Berthold Seger
,
Antonio Di Giandomenico
,
Luca Gori
A 1.5V 200MS/s 13b 25mW DAC with Randomized Nested Background Calibration in 0.13μm CMOS.
ISSCC
(2007)
Hubert Weinberger
,
Andreas Wiesbauer
,
Christian Fleischhacker
,
Joerg Hauptmann
,
Thomas Ferianz
,
Michael Staber
,
Dietmar Sträußnigg
,
Berthold Seger
An ADSL-RT full-rate analog front end IC with integrated line driver.
IEEE J. Solid State Circuits
37 (7) (2002)
Andreas Wiesbauer
,
Martin Clara
,
Moritz Harteneck
,
Thomas Pötscher
,
Berthold Seger
,
Christoph Sandner
,
Christian Fleischhacker
A fully integrated analog front-end macro for cable modem applications in 0.18-μm CMOS.
IEEE J. Solid State Circuits
37 (7) (2002)
Thomas Linder
,
Herbert Zojer
,
Berthold Seger
Fully analogue LMS adaptive notch filter in BICMOS technology.
IEEE J. Solid State Circuits
31 (1) (1996)