Bernard Goossens

Publication Activity (10 Years)

Years Active: 1995-2021
Publications (10 Years): 3

Top Topics

Texture Classification

Parallel Processing

Distributed Memory

Multi Core Processors

Top Venues

Tech. Sci. Informatiques

Concurr. Comput. Pract. Exp.

Publications

Bernard Goossens, Kenelm Louetsi, David Parello
Deterministic OpenMP and the LBP Parallelizing Manycore Processor. PaCT (2021)
Bernard Goossens, David Parello, Katarzyna Porada, Djallal Rahmoune
Computing on many cores. Concurr. Comput. Pract. Exp. 29 (15) (2017)
Bernard Goossens, David Parello, Katarzyna Porada, Djallal Rahmoune
Parallel Locality and Parallelization Quality. PMAM@PPoPP (2016)
Bernard Goossens, David Parello, Katarzyna Porada, Djallal Rahmoune
Toward a Core Design to Distribute an Execution on a Manycore Processor. PaCT (2015)
Bernard Goossens, Ali El Moussaoui, Ke Chen, David Parello
De quoi est faite une trace d'exécution ? Tech. Sci. Informatiques 32 (2) (2013)
Bernard Goossens, David Parello
Limits of Instruction-Level Parallelism Capture. ICCS (2013)
Mourad Bouache, David Parello, Bernard Goossens
Accélération de la simulation modulaire. Tech. Sci. Informatiques 30 (9) (2011)
Bernard Goossens, Philippe Langlois, David Parello, Eric Petit
PerPI: A Tool to Measure Instruction Level Parallelism. PARA (1) (2010)
Benaoumeur Senouci, Mourad Bouache, Bernard Goossens
Heterogeneous Multi-processor SoC Design: Hardware Bridging and Exploration Methodology. ESA (2009)
Benaoumeur Senouci, Ali El Moussaoui, Bernard Goossens
Software Platform based Embedded Multiprocessor SoC Prototyping. CIIA (2009)
Bernard Goossens, David Defour
Ordonnancement distribué d'instructions. Tech. Sci. Informatiques 25 (7) (2006)
Bernard Goossens, David Defour
The instruction register file micro-architecture. Future Gener. Comput. Syst. 21 (4) (2005)
Bernard Goossens
The Instruction Register File. PaCT (2003)
Bernard Goossens
Typing the ISA to cluster the processor. Future Gener. Comput. Syst. 18 (6) (2002)
Bernard Goossens
Handling 16 instructions per cycle in a superscalar processor. Future Gener. Comput. Syst. 17 (6) (2001)
Bernard Goossens
Typing the ISA to Cluster the Processor. PaCT (2001)
Bernard Goossens, Hassane Essafi, Marc Pic
Hardware and Software Optimizations for Multimedia Databases. PaCT (1999)
Bernard Goossens
A Multithreaded Vector Co-processor. PaCT (1997)
Bernard Goossens, Duc Thang Vu
On-Chip Multiprocessing. Euro-Par, Vol. II (1996)
Bernard Goossens, Duc Thang Vu
Multithreading to Improve Cycle Width and CPI in Superpipelined Superscalar Processors. ISPAN (1996)
Bernard Goossens
Les architectures risc et polo: un processeur oriente objet. Bull. dInformatique Approfondie et Appl. 43 (1996)
Bernard Goossens, Duc Thang Vu
Further Pipelining and Multithreading to Improve RISC Processor Speed. A Proposed Architecture and Simulation Results. PaCT (1995)