Balakrishna Jayadev

Publication Activity (10 Years)

Years Active: 2016-2018
Publications (10 Years): 3

Top Topics

Application Domains

Top Venues

Publications

Amitava Majumdar, Balakrishna Jayadev
Handling Clock-Domain Crossings in Dual Clock-Edge Logic for DFx Features. ATS (2018)
Amitava Majumdar, Balakrishna Jayadev, Da Cheng, Albert Lin
Architecture for Reliable Scan-Dump in the Presence of Multiple Asynchronous Clock Domains in FPGA SoCs. ATS (2017)
Georgios Tzimpragos, Da Cheng, Stephanie Tapp, Balakrishna Jayadev, Amitava Majumdar
Application debug in FPGAs in the presence of multiple asynchronous clocks. FPT (2016)