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B. Ganapathy Ram
Publication Activity (10 Years)
Years Active: 2018-2018
Publications (10 Years): 1
Top Topics
Efficient Implementation
Arithmetic Coding
Field Programmable Gate Array
Hardware Architecture
Top Venues
Int. J. Bus. Intell. Data Min.
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Publications
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S. D. Jayavathi
,
A. Shenbagavalli
,
B. Ganapathy Ram
Efficient hardware architecture for integer implementation of multi-alphabet arithmetic coding for data mining.
Int. J. Bus. Intell. Data Min.
13 (1/2/3) (2018)