Artur Chojnacki

Publication Activity (10 Years)

Years Active: 1998-2008
Publications (10 Years): 0

Publications

Lech Józwiak, Artur Chojnacki, Aleksander Slusarczyk
High-Quality Circuit Synthesis for Modern Technologies. ISQED (2008)
Lech Józwiak, Szymon Bieganski, Artur Chojnacki
Information-driven circuit synthesis with the pre-characterized gate libraries. J. Syst. Archit. 51 (6-7) (2005)
Lech Józwiak, Artur Chojnacki
Effective and efficient FPGA synthesis through general functional decomposition. J. Syst. Archit. 49 (4-6) (2003)
Lech Józwiak, Aleksander Slusarczyk, Artur Chojnacki
Fast and compact sequential circuits for the FPGA-based reconfigurable systems. J. Syst. Archit. 49 (4-6) (2003)
Lech Józwiak, Szymon Bieganski, Artur Chojnacki
Information-driven Library-based Circuit Synthesis. DSD (2003)
Lech Józwiak, Artur Chojnacki
High-quality sub-function construction in functional decomposition based on information relationship measures. DATE (2001)
Artur Chojnacki, Lech Józwiak
High-quality FPGA Designs through Functional Decomposition with Sub-function Input Support Selection Based on Information Relationship Measures. ISQED (2001)
Lech Józwiak, Artur Chojnacki, Aleksander Slusarczyk
Fast and Compact Sequential Circuits through the Information-Driven Circuit Synthesis. DSD (2001)
Lech Józwiak, Artur Chojnacki
Effective and Efficient FPGA Synthesis through Functional Decomposition Based on Information Relationship Measures. DSD (2001)
Artur Chojnacki, Lech Józwiak
Multi-Valued Sub-Function Encoding in Functional Decomposition Based on Information Relationships Measures. ISMVL (2000)
Lech Józwiak, Artur Chojnacki
Functional Decomposition based on Information Relationship Measures Extremely Effective and Efficient for Symmetric Functions. EUROMICRO (1999)
Mariusz Rawski, Lech Józwiak, Artur Chojnacki
Application of the Information Measures to Input Support Selection in Functional Decomposition. Rough Sets and Current Trends in Computing (1998)
Mariusz Rawski, Tadeusz Luba, Lech Józwiak, Artur Chojnacki
Efficient Logic Synthesis for FPGAs with Functional Decomposition Based on Information Relationship Measure. EUROMICRO (1998)