Andres Teene

Publication Activity (10 Years)

Years Active: 2005-2009
Publications (10 Years): 0

Publications

R. Venkatraman, R. Castagnetti, Andres Teene, Benjamin Mbouombouo, S. Ramesh
Power & variability test chip architecture and 45nm-generation silicon-based analysis for robust, power-aware SoC design. ISQED (2009)
R. Castagnetti, R. Venkatraman, Brandon Bartz, Carl Monzel, T. Briscoe, Andres Teene, S. Ramesh
A High-Performance SRAM Technology With Reduced Chip-Level Routing Congestion for SoC. ISQED (2005)
Andres Teene, Bob Davis, Ruggero Castagnetti, Jeff Brown, S. Ramesh
Impact of Interconnect Process Variations on Memory Performance and Design. ISQED (2005)