A High-Performance SRAM Technology With Reduced Chip-Level Routing Congestion for SoC.
R. CastagnettiR. VenkatramanBrandon BartzCarl MonzelT. BriscoeAndres TeeneS. RameshPublished in: ISQED (2005)
Keyphrases
- embedded dram
- low power
- cmos technology
- random access memory
- signal processor
- power consumption
- cost effective
- low power consumption
- low cost
- high speed
- hardware and software
- nm technology
- computer systems
- dynamic routing
- metal oxide semiconductor
- shortest path
- packet transmission
- routing problem
- image sensor
- data transmission
- network reliability
- network topology
- analog vlsi