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Amit Kumar Panda
ORCID
Publication Activity (10 Years)
Years Active: 2015-2021
Publications (10 Years): 5
Top Topics
Xilinx Virtex
Vlsi Implementation
Pseudorandom
Vlsi Architecture
Top Venues
IEEE Trans. Instrum. Meas.
IEEE Trans. Circuits Syst. I Regul. Pap.
iNIS
IEEE Trans. Circuits Syst.
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Publications
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Rakesh Palisetty
,
Amit Kumar Panda
,
Kailash Chandra Ray
ASIC Implementation of Low PAPR Multidevice Variable-Rate Architecture for IEEE 802.11ah.
IEEE Trans. Instrum. Meas.
70 (2021)
Amit Kumar Panda
,
Rakesh Palisetty
,
Kailash Chandra Ray
High-Speed Area-Efficient VLSI Architecture of Three-Operand Binary Adder.
IEEE Trans. Circuits Syst.
(11) (2020)
Amit Kumar Panda
,
Kailash Chandra Ray
A Coupled Variable Input LCG Method and its VLSI Architecture for Pseudorandom Bit Generation.
IEEE Trans. Instrum. Meas.
69 (4) (2020)
Amit Kumar Panda
,
Rakesh Palisetty
,
Kailash Chandra Ray
Area-Efficient Parallel-Prefix Binary Comparator.
iSES
(2019)
Amit Kumar Panda
,
Kailash Chandra Ray
Modified Dual-CLCG Method and its VLSI Architecture for Pseudorandom Bit Generation.
IEEE Trans. Circuits Syst. I Regul. Pap.
(3) (2019)
Amit Kumar Panda
,
Kailash Chandra Ray
FPGA Prototype of Low Latency BBS PRNG.
iNIS
(2015)