VLSIC

Publications

2015

Shih-Hao Huang, Wei-Zen Chen
A 25-Gb/s, -10.8-dBm input sensitivity, PD-bandwidth tolerant CMOS optical receiver. VLSIC (2015)
Sung-Wan Hong, Gyu-Hyeong Cho
7.4μW Ultra-high slew-rate pseudo single-stage amplifier driving 0.1-to-15nF capacitive load with >69° phase margin. VLSIC (2015)
Lingyu Hong, Simon McManus, Haw Yang, Kaushik Sengupta
A fully integrated CMOS fluorescence biosensor with on-chip nanophotonic filter. VLSIC (2015)
Sebastian Loeda, Jeffrey Harrison, Franck Pourchet, Andrew Adams
A 10/20/30/40 MHz feed-forward FIR DAC continuous-time ΔΣ ADC with robust blocker performance for radio receivers. VLSIC (2015)
Philippe Magarshack
Breakthrough technologies and reference designs for new IoT applications. VLSIC (2015)
S. C. Song, J. Xu, N. N. Mojumder, K. Rim, D. Yang, Jerry Bao, J. Zhu, J. Wang, Mustafa Badaroglu, V. Machkaoutsan, P. Narayanasetti, B. Bucki, J. Fischer, Geoffrey Yeap
Holistic technology optimization and key enablers for 7nm mobile SoC. VLSIC (2015)
Gerard Villar Pique, Henk Jan Bergveld, Ravi Karadi
PCB area. VLSIC (2015)
Alireza Sharif Bakhtiar, Anthony Chan Carusone
A 19.6-Gbps CMOS optical receiver with local feedback IIR DFE. VLSIC (2015)
Koji Takinami, Naganori Shirakata, Koichiro Tanaka, Takayuki Tsukizawa, Hiroyuki Motozuka, Yohei Morishita, Kenji Miyanaga, Takenori Sakamoto, Tomoya Urushihara, Masashi Kobayashi, Hiroshi Takahashi, Masatake Irie, Hiroyuki Yoshikawa, Atsushi Yoshimoto, Maki Nakamura, Takeaki Watanabe, Hiroshi Komori, Noriaki Saito
A 60GHz wireless transceiver employing hybrid analog/digital beamforming with interference suppression for multiuser gigabit/s radio access. VLSIC (2015)
Sang Min Lee, Dongwon Seo, Shahin Mehdizad Taleie, Derui Kong, Michael Joseph McGowan, Tongyu Song, Ganesh R. Saripalli, Jenny Kuo, Seyfi S. Bazarjani
A 14b 750MS/s DAC in 20nm CMOS with <-168dBm/Hz noise floor beyond Nyquist and 79dBc SFDR utilizing a low glitch-noise hybrid R-2R architecture. VLSIC (2015)
Mahmood Khayatzadeh, Fabio Frustaci, David T. Blaauw, Dennis Sylvester, Massimo Alioto
A reconfigurable sense amplifier with 3X offset reduction in 28nm FDSOI CMOS. VLSIC (2015)
Taewook Kim, Changsok Han, Nima Maghari
A 7.2 mW 75.3 dB SNDR 10 MHz BW CT delta-sigma modulator using Gm-C-based noise-shaped quantizer and digital integrator. VLSIC (2015)
Wei-Hsuan Wu, Wei-Cheng Sun, Chia-Hsiang Yang, Yeong-Luh Ueng
A 794Mbps 135mW iterative detection and decoding receiver for 4×4 LDPC-coded MIMO systems in 40nm. VLSIC (2015)
Yosuke Bando, Konosuke Watanabe, Ken-ichi Maeda, Hiroki Kudo, Masahiro Ishiyama, Atsushi Kunimatsu, Hiroto Nakai, Masafumi Takahashi, Yukihito Oowaki
Caching mechanisms towards single-level storage systems for Internet of Things. VLSIC (2015)
Jaeduk Han, Yue Lu, Nicholas Sutardja, Kwangmo Jung, Elad Alon
A 60Gb/s 173mW receiver frontend in 65nm CMOS technology. VLSIC (2015)
Scott Sills, Shuichiro Yasuda, Alessandro Calderoni, Christopher Cardon, Jonathan Strand, Katsuhisa Aratani, Nirmal Ramaswamy
Challenges for high-density 16Gb ReRAM with 27nm technology. VLSIC (2015)
Dongsuk Jeon, Qing Dong, Yejoong Kim, Xiaolong Wang, Shuai Chen, Hao Yu, David T. Blaauw, Dennis Sylvester
A 23mW face recognition accelerator in 40nm CMOS with mostly-read 5T memory. VLSIC (2015)
Yukio Hayakawa, Atsushi Himeno, Ryutaro Yasuhara, W. Boullart, E. Vecchio, T. Vandeweyer, T. Witters, D. Crotti, M. Jurczak, S. Fujii, S. Ito, Y. Kawashima, Yuuichirou Ikeda, Akifumi Kawahara, Ken Kawai, Zhiqiang Wei, Shunsaku Muraoka, Kazuhiko Shimakawa, Takumi Mikawa, Shinichi Yoneda
Highly reliable TaOx ReRAM with centralized filament for 28-nm embedded application. VLSIC (2015)
Yida Duan, Elad Alon
A 6b 46GS/s ADC with >23GHz BW and sparkle-code error correction. VLSIC (2015)
Alessandro Cevrero, Cosimo Aprile, Pier Andrea Francese, U. Bapst, Christian Menolfi, Matthias Braendli, Marcel A. Kossel, Thomas Morf, Lukas Kull, Hazar Yueksel, Ilter Oezkaya, Yusuf Leblebici, Volkan Cevher, Thomas Toifl
A 5.9mW/Gb/s 7Gb/s/pin 8-lane single-ended RX with crosstalk cancellation scheme using a XCTLE and 56-tap XDFE in 32nm SOI CMOS. VLSIC (2015)
Ting-Kuei Kuan, Shen-Iuan Liu
A digital bang-bang phase-locked loop with automatic loop gain control and loop latency reduction. VLSIC (2015)
Michael Fausten, Thorsten Huck, Armin Ruhle, Tuelin Baysal, Robert Kornhaas
Automated driving - Impacts on the vehicle architecture. VLSIC (2015)
Kyung-Hoae Koo, Liqiong Wei, John Keane, Uddalak Bhattacharya, Eric A. Karl, Kevin Zhang
high density and aging resilient 8T SRAM with 14nm FinFET technology featuring 560mV VMIN with read and write assist. VLSIC (2015)
Sharvil Patil, Alin Ratiu, Dominique Morche, Yannis P. Tsividis
error-shaping alias-free asynchronous ADC. VLSIC (2015)
Christian Bachmann, Maja Vidojkovic, Xiongchuan Huang, Maarten Lont, Yao-Hong Liu, Ming Ding, Benjamin Busze, Jordy Gloudemans, Hans Giesen, Adnane Sbai, Gert-Jan van Schaik, Nauman F. Kiyani, Kouichi Kanda, Kazuaki Oishi, Shoichi Masui, Kathleen Philips, Harmke de Groot
A 3.5mW 315/400MHz IEEE802.15.6/proprietary mode digitally-tunable radio SoC with integrated digital baseband and MAC processor in 40nm CMOS. VLSIC (2015)
Dongjoo Shin, Injoon Hong, Gyeonghoon Kim, Hoi-Jun Yoo
A 33 nJ/vector descriptor generation processor for low-power object recognition. VLSIC (2015)
Zhijie Chen, Masaya Miyahara, Akira Matsuzawa
A 9.35-ENOB, 14.8 fJ/conv.-step fully-passive noise-shaping SAR ADC. VLSIC (2015)
Kiarash Gharibdoust, Armin Tajalli, Yusuf Leblebici
A 4×9 Gb/s 1 pJ/b NRZ/multi-tone serial-data transceiver with crosstalk reduction architecture for multi-drop memory interfaces in 40nm CMOS. VLSIC (2015)
Chun C. Lee, Cho-Ying Lu, Ramya Narayanaswamy, Jad B. Rizk
A 12b 70MS/s SAR ADC with digital startup calibration in 14nm CMOS. VLSIC (2015)
David Shan, Phillip J. Restle, Doug Malone, Robert A. Groves, Eric Lai, Michael Koch, Jason Hibbeler, Yong Kim, Christos Vezyrtzis, Jan Feder, David Hogenmiller, Thomas J. Bucelot
. VLSIC (2015)
Makoto Ueki, K. T. Akeuchi, T. Yamamoto, Akira Tanabe, N. Ikarashi, M. Saitoh, T. Nagumo, Hiroshi Sunamura, Mitsuru Narihiro, Kazuya Uejima, Koji Masuzaki, Naoya Furutake, S. Saito, Y. Yabe, Akira Mitsuiki, Koichi Takeda, Takashi Hase, Yoshihiro Hayashi
Low-power embedded ReRAM technology for IoT applications. VLSIC (2015)
Sohmyung Ha, Abraham Akinin, Jongkil Park, Chul Kim, Hui Wang, Christoph Maier, Gert Cauwenberghs, Patrick P. Mercier
A 16-channel wireless neural interfacing SoC with RF-powered energy-replenishing adiabatic stimulation. VLSIC (2015)
Chang-Kyo Lee, Min-Su Ahn, Daesik Moon, Kiho Kim, Yoon-Joo Eom, Won-Young Lee, Jongmin Kim, Sanghyuk Yoon, Baekkyu Choi, Seokhong Kwon, Joon-Young Park, Seung-Jun Bae, Yong-Cheol Bae, Jung-Hwan Choi, Seong-Jin Jang, Gyo-Young Jin
A 6.4Gb/s/pin at sub-1V supply voltage TX-interleaving technique for mobile DRAM interface. VLSIC (2015)
Zhiqiang Huang, Howard Cam Luong
A dithering-less 54.79-to-63.16GHz DCO with 4-Hz frequency resolution using an exponentially-scaling C-2C switched-capacitor ladder. VLSIC (2015)
Karthikeyan Reddy, Siladitya Dey, Sachin Rao, Brian Young, Praveen Prabha, Pavan Kumar Hanumolu
A 54mW 1.2GS/s 71.5dB SNDR 50MHz BW VCO-based CT ΔΣ ADC using dual phase/frequency feedback in 65nm CMOS. VLSIC (2015)
Tadaaki Yamauchi, Hiroyuki Kondo, Koji Nii
Automotive low power technology for IoT society. VLSIC (2015)
Kazuo Yano, Tomoaki Akitomi, Koji Ara, Jun-ichiro Watanabe, Satomi Tsuji, Nobuo Sato, Miki Hayakawa, Norihiko Moriwaki
Profiting from IoT: The key is very-large-scale happiness integration. VLSIC (2015)
Phillip M. Nadeau, Arun Paidimarri, Anantha P. Chandrakasan
4.2 pW timer for heavily duty-cycled systems. VLSIC (2015)
Si-Duk Sung, Sung-Wan Hong, Jun-Suk Bang, Ji-Seon Paek, Seung-Chul Lee, Thomas Byunghak Cho, Gyu-Hyeong Cho
86.55% Peak efficiency envelope modulator for 1.5W 10MHz LTE PA without AC coupling capacitor. VLSIC (2015)
Hiroaki Yoda, E. Kitagawa, Naoharu Shimomura, S. Fujita, Minoru Amano
The progresses of MRAM as a memory to save energy consumption and its potential for further reduction. VLSIC (2015)
Tejasvi Anand, Kofi A. A. Makinwa, Pavan Kumar Hanumolu
A self-referenced VCO-based temperature sensor with 0.034°C/mV supply sensitivity in 65nm CMOS. VLSIC (2015)
Liechao Huang, Josue Sanz-Robinson, Tiffany Moy, Yingzhe Hu, Warren Rieutort-Louis, Sigurd Wagner, James C. Sturm, Naveen Verma
Reconstruction of multiple-user voice commands using a hybrid system based on thin-film electronics and CMOS. VLSIC (2015)
Dina El-Damak, Anantha P. Chandrakasan
Solar energy harvesting system with integrated battery management and startup using single inductor and 3.2nW quiescent power. VLSIC (2015)
Iman Madadi, Massoud Tohidian, Koen Cornelissens, Patrick Vandenameele, Robert Bogdan Staszewski
A TDD/FDD SAW-less superheterodyne receiver with blocker-resilient band-pass filter and multi-stage HR in 28nm CMOS. VLSIC (2015)
Taehun Yoon, Joon-Yeong Lee, Kwangseok Han, Jeong-Sup Lee, Sangeun Lee, Taeho Kim, Hyosup Won, Jinho Park, Hyeon-Min Bae
A 100-GbE reverse gearbox IC in 40nm CMOS for supporting legacy 10- and 40-GbE standards. VLSIC (2015)
Joseph Palackal Mathew, Long Kong, Behzad Razavi
A 12-bit 200-MS/s 3.4-mW CMOS ADC with 0.85-V supply. VLSIC (2015)
Eric Shiu, Simon Prakash
System challenges and hardware requirements for future consumer devices: From wearable to ChromeBooks and devices in-between. VLSIC (2015)
Chul Kim, Siddharth Joshi, Chris M. Thomas, Sohmyung Ha, Abraham Akinin, Lawrence E. Larson, Gert Cauwenberghs
A CMOS 4-channel MIMO baseband receiver with 65dB harmonic rejection over 48MHz and 50dB spatial signal separation over 3MHz at 1.3mW. VLSIC (2015)
Hyeongseok Kim, Gyouho Kim, Yoonmyung Lee, Zhiyoong Foo, Dennis Sylvester, David T. Blaauw, David D. Wentzloff
fully-integrated, wireless sensor node with 8GHz UWB transmitter. VLSIC (2015)
Shang-Fu Yeh, Kuo-Yu Chou, Honyih Tu, Calvin Yi-Ping Chao, Fu-Lung Hsueh
rms temporal-readout-noise 3D-stacked CMOS image sensor with conditional correlated multiple sampling (CCMS) technique. VLSIC (2015)