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Analysis of network-on-chip topologies for cost-efficient chip multiprocessors.
Marta Ortín-Obón
Darío Suárez Gracia
María Villarroya-Gaudó
Cruz Izu
Víctor Viñals Yúfera
Published in:
Microprocess. Microsystems (2016)
Keyphrases
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cost efficient
network on chip
real time
web services
low cost
high speed
routing algorithm
data transmission
network simulator