Implementation of CMOS Low-power Integer-N Frequency Synthesizer for SOC Design.
Debashis MandalT. K. BhattacharyyaPublished in: J. Comput. (2008)
Keyphrases
- low power
- cmos technology
- vlsi architecture
- single chip
- power consumption
- high speed
- ultra low power
- low cost
- low power consumption
- logic circuits
- mixed signal
- digital signal processing
- power dissipation
- high power
- gate array
- vlsi circuits
- wireless transmission
- signal processor
- low voltage
- analog to digital converter
- circuit design
- power reduction
- image sensor
- efficient implementation
- nm technology
- delay insensitive
- vlsi implementation
- hardware and software
- design considerations