HTR: On-Chip Hardware Task Relocation for Partially Reconfigurable FPGAs.
Aurelio Morales-VillanuevaAnn Gordon-RossPublished in: ARC (2013)
Keyphrases
- field programmable gate array
- reconfigurable hardware
- programmable logic
- low cost
- hardware implementation
- host computer
- hardware software
- embedded systems
- low power consumption
- application specific integrated circuits
- digital signal processors
- parallel computing
- hardware architecture
- image processing algorithms
- evolvable hardware
- fpga implementation
- hardware and software
- computing systems
- single chip
- hardware design
- fine grain
- functional units
- vlsi implementation
- processing elements
- signal processing
- high speed
- image processing
- smart camera
- parallel architectures
- operating system
- general purpose processors
- high density