Implicit FSM decomposition applied to low-power design.
José C. MonteiroArlindo L. OliveiraPublished in: IEEE Trans. Very Large Scale Integr. Syst. (2002)
Keyphrases
- low power
- single chip
- high speed
- power consumption
- low power consumption
- low cost
- vlsi architecture
- logic circuits
- digital signal processing
- mixed signal
- gate array
- ultra low power
- cmos technology
- vlsi circuits
- power dissipation
- power reduction
- design process
- parallel processing
- application specific
- error correction
- efficient implementation
- bitstream
- high power
- delay insensitive
- general purpose
- image processing