Co-synthesis of a configurable SoC platform based on a network on chip architecture.

Mário P. Véstias Horácio C. Neto

Published in: ASP-DAC (2006)

Keyphrases

network on chip
multi processor
routing algorithm
real time
packet switched
network simulator
data transfer
power dissipation
low power
image processing
multistage
hardware and software
parallel architecture