The Effect of CMOS VLSI IDDq Measurement on Defect Level.

Junichi Hirase Masanori Hamada

Published in: IEICE Trans. Inf. Syst. (1995)

Keyphrases

high speed
vlsi circuits
correlation analysis
higher level
low cost
signal processing
circuit design
power consumption
low power
levels of abstraction
single chip
chip design
data sets
machine learning
image processing
analog vlsi