Login / Signup
Simulation-based circuit-activity estimation for FPGAs containing hard blocks.
Sean Seeley
Vidya Sankaranaryanan
Zack Deveau
Panagiotis Patros
Kenneth B. Kent
Published in:
RSP (2017)
Keyphrases
</>
high speed
accurate estimation
neural network
density estimation
estimation accuracy
real time
genetic algorithm
least squares
parametric models
robust estimation
block size
estimation process
activity theory
brain activity