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Optimizing packet lookup in time and space on FPGA.

Thilan GanegedaraViktor K. PrasannaGordon J. Brebner
Published in: FPL (2012)
Keyphrases
  • high speed
  • neural network
  • space time
  • image processing
  • low cost
  • hardware design
  • single chip
  • real time image processing