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Supervised Triple Macrosynchronized Lockstep (STMLS) Architecture for Multicore Processors.

Pablo M. AvilesJose A. BellochLuis EntrenaAlmudena Lindoso
Published in: IEEE Access (2023)
Keyphrases
  • multicore processors
  • computing power
  • real time
  • operating system
  • graphical models
  • high level
  • database systems
  • data streams
  • fine grained
  • software architecture
  • highly parallel