A 252Kgates/4.9Kbytes SRAM/71mW multistandard video decoder for high definition video applications.
Chih-Da ChienCheng-An ChienJui-Chin ChuJiun-In GuoChing-Hwa ChengPublished in: ACM Trans. Design Autom. Electr. Syst. (2009)
Keyphrases
- video decoder
- power consumption
- high definition video
- motion vectors
- video coding
- low power consumption
- video codec
- low power
- bit rate
- bitstream
- motion estimation
- motion compensation
- video compression
- video sequences
- rate distortion
- motion compensated
- macroblock
- video quality
- video data
- motion field
- computational complexity
- memory subsystem
- reference frame
- computer vision
- subband
- image quality
- low bit rate
- single chip
- image sequences
- general purpose
- coding method
- coding scheme
- visual quality