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A 33Mpixel 120fps CMOS image sensor using 12b column-parallel pipelined cyclic ADCs.

Toshihisa WatabeKazuya KitamuraTakehide SawamotoTomohiko KosugiTomoyuki AkahoriTetsuya IidaKeigo IsobeTakashi WatanabeHiroshi ShimamotoHiroshi OhtakeSatoshi AoyamaShoji KawahitoNorifumi Egami
Published in: ISSCC (2012)
Keyphrases
  • cmos image sensor
  • parallel processing
  • parallel architecture
  • low cost
  • single chip
  • real time
  • general purpose
  • frame rate
  • dynamic range
  • massively parallel
  • solid state
  • parallel computing
  • processing capabilities