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An oscillator collapse-based comparator with application in a 74.1dB SNDR, 20KS/s 15b SAR ADC.

Minseob ShimSeokhyeon JeongPaul D. MyersSuyoung BangChulwoo KimDennis SylvesterDavid T. BlaauwWanyeong Jung
Published in: VLSI Circuits (2016)
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