Optimal design of dummy ball array in wafer level package to improve board level thermal cycle reliability (BLR).
Seongwon JeongJinseok KimAyoung KimByungwook KimMoonsoo LeeJaewon ChangIn Hak BaickHanbyul KangYounggeun JiSangchul ShinSangwoo PaePublished in: IRPS (2018)